It's hard to reduce the horizontal size, make it vertical. 🍋
Here comes the world's first 3D chip, which clearly changed the concept of chip design instead of putting everything in a single plane. This chip chooses to place key components like caches and other parts vertically on the same die.
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Many people may wonder how different it is from the technology we are familiar with like Ryzen X3D. It must be explained that most chips generally place the main components on the same surface, even with the addition of a memory layer, but they are later assembled, and they are still separated, not designed as multiple layers from the beginning.
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The new 3D chip is the work of a team of researchers from Stanford, Carnegie Mellon, the University of Pennsylvania and MIT who partnered with SkyWater Technology, a U.S. chip manufacturing mercenary factory, and marks the first time a chip of this nature has actually been produced on a commercial production line, not just lab experimental work.
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The main idea is to vertically connect memory and CPUs, shorten the transmission distance considerably, directly affecting performance, especially in AI tasks that require huge amounts of traffic. Tests with prototype chips showed that they can run about four times faster than traditional chips.
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Looking ahead, simulations of structures that increase the number of layers indicate that performance in certain AI tasks, such as Meta's LLaMA-based model, can increase by up to 12 times, and in the long run, this approach can increase energy efficiency by 100 to 1,000 times.
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At first this prototype chip used a 90-130 nm manufacturing process, which sounds like an ancient technology, because today the chip industry is talking about levels below 2 nm, but the key part of this work is not transistor miniaturization, but rather design ideas by integrating both CMOS, ReRAM and carbon nanotube transistors into a single structure, along with vertical placement.
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This makes it possible to add layers of memory and processing circuitry to it, where the chip face size hardly needs to be expanded accordingly. This approach clearly reflects that the chip industry may no longer be driven forward by being "smaller" alone, and that design in vertical dimensions is becoming a chip milestone for the coming AI era.
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Source: tomshardware
